1. Field of the Invention
The invention relates to a method for refreshing dynamic memory cells in a memory circuit. Furthermore, the invention relates to a memory circuit having a memory cell array and having a refresh circuit for refreshing the memory cells.
2. Description of the Related Art
A dynamic memory cell usually has a storage capacitance, which can be connected to a bit line in switchable fashion via a memory transistor. The memory transistor is driven via a word line, the opening or blocking of the memory transistor being prescribed in accordance with an activation signal. During the read-out of the memory cell, first of all the memory transistor is opened by means of the activation signal and the charge stored in the storage capacitance flows onto the bit line connected to the memory cell.
In a dynamic memory circuit, bit lines are in each case arranged in pairs, an activation signal causing a storage capacitance to be connected only to one of the bit lines of a bit line pair. The flowing of the charge of the storage capacitance onto the bit line brings about a charge potential difference on the bit lines of the bit line pair, which is amplified by a sense amplifier connected to the bit line pair. In this case, the charge potential of the bit line which has the lower potential is charged to a low charge potential and the potential of the bit line which has the higher potential is charged to a high charge potential. As a result, on the one hand, the low storage charge is amplified in such a way that a signal can be read out at an output of the sense amplifier and, on the other hand, the stored signal is written back to the memory cell read, so that the stored charge information is not lost after the charge information has been read out from the memory cell. The memory cell loses charge, and thus the information stored in it, not only during access to the memory cell but also through leakage currents. For this reason, every memory cell of an integrated circuit regularly has the information stored in it written to it anew. This operation is called refreshing.
The memory cell is refreshed essentially by means of an activation of the corresponding word line, the charges flowing from the storage capacitances of the memory cells connected to the word line onto a respective one of the bit lines of the bit line pairs that cross the word line. The resulting charge difference on the bit lines is amplified by the respective sense amplifiers, the potential of the bit line connected to the memory cell being charged to a high or low charge potential depending on the charge information stored in the memory cell. By virtue of the fact that the word line remains activated for the time period in which the sense amplifier amplifies the charge difference, the charge can flow back from the amplified potential of the bit line into the memory cell.
The refreshing of the memory cells is repeated at regular intervals, so that charge losses in the storage capacitances on account of the leakage currents or the like do not lead to a loss of the charge information. The time duration between the refresh operations on a word line is chosen such that the contents of the memory cells can be reliably read out during each refresh operation.
The cyclic refresh operations in a memory circuit having dynamic memory cells substantially determine the current consumption of a dynamic memory circuit. In this case, the current consumption is only partially determined by the charges which are written to the memory cells. Another significant factor of the current consumption consists in the current taken up by peripheral drive circuits and essentially depends on the frequency of the periodic driving of the word lines.
The current consumption is a significant factor for dynamic memory circuits. Mobile applications, in particular, require the current consumption to be reduced as far as possible. Since, in particular, the refreshing of dynamic memory cells constitutes a considerable factor in the current consumption, it is therefore an object of the present invention to provide a current-saving method for refreshing dynamic memory cells. It is furthermore an object of the present invention to provide a memory circuit having a refresh circuit which has a current consumption that is as low as possible.